In general, a phase change memory device may be fabricated by forming a resistor to correspond to a phase change memory cell disposed on a semiconductor substrate. The resistor may include a phase-change material. The phase change memory cell may be in contact with a lower electrode at a lower portion of the memory cell, and may be in contact with an upper electrode at an upper portion of the memory cell. The lower electrode may be formed to at least partially fill an opening of a selected interlayer insulating layer. The resistor may fill the opening of the interlayer insulating layer and form the phase change memory cell. As a result, the phase change memory cell may be disposed in the opening to expose the interlayer insulating layer.
The phase change memory cell may not sufficiently fill the opening of the interlayer insulating layer on the lower electrode. This deficiency may result because the resistor is formed using a chemical vapor deposition technique of a semiconductor deposition process. In this case, the chemical vapor deposition technique may generate source gases by vaporizing liquid phase precursors without adjusting the amount of the liquid phase precursors. The source gases may be injected into a process chamber of semiconductor deposition equipment to form materials including germanium (Ge) and tellurium (Te), and materials including antimony (Sb) and tellurium (Te) on the semiconductor substrate.
The materials including Sb and Te are well-known to those of ordinary skill in the art, and have a greater chance of crystallization than materials including Ge and Te at the same temperature. Therefore, because the materials including Sb and Te can be formed without adjusting the amount of the liquid phase precursors, they generally cannot stably undergo chemical reactions with the materials including Ge and Te. The materials including Ge and Te may not have a smooth interface with the materials including Sb and Te. The materials including Ge, Sb and Te may form a void in the resistor.
As a result, the phase change memory cell may not have a desired uniform resistance on the entire surface of the semiconductor substrate. Further, the upper electrode may be formed on the interlayer insulating layer to cover the phase change memory cell. The phase change memory cell may not provide desired electrical bits to a phase change memory device through the lower and upper electrodes.